In semiconductor devices, fin-shaped field effect transistors (FINFET) are often used to increase device functionality and versatility, and to decrease device size and improve device performance. Semiconductor device manufacturing and design may be limited by application and/or creation of FINFETS as a result of process limitations related to FINFET density. In the manufacturing of some FINFETS, epitaxial silicon may be grown in source/drain regions to improve series resistance in the FINFET. This epitaxial silicon may increase the effective width of the fins, which reduces the spacing between fin sources/drains and gate contacts, potentially causing issues such as gate contact shorting (e.g., to expanded source/drain regions) which may limit the number of fins which may be created in FINFET designs. This fin limitation may cause an increase in the number of library tracks on the device and/or may lower performance per area values for the entire semiconductor device.